C8051F410 利用PCA 中斷 送16bit PWM
使用貴公司之C8051F410
詢問一下使用C8051F410之 PCA interrupt 產生16bit的PWM
時，並以內部SYSCLK (24.5MHz)當作Time base ,當中斷發生時
改變PWM duty
但是按照此一設定，PCA中斷頻率並非２５．４MHz
而是375.2Hz，一直無法釐清３７５．２Hz是怎麼產生的
想了解是否MCU 之極限？若要將中斷頻率提高到６．３５MHz 或 ２４．５Mhz
是否無法套用PCA Timebase 為 SYSCLK
而只能改採Timer0 Overflow的方式?
原碼簡化如下:
void PCA_Init()
{
PCA0CN = 0x40;
PCA0MD &= ~0x40;
PCA0MD = 0x09;
PCA0CPM0 = 0xC2;
PCA0CPM1 = 0xC2;
PCA0CPM2 = 0xC2;
PCA0CPM3 = 0xC2;
PCA0CPL0 = 0xFF;
PCA0CPH0 = 0xFF;
PCA0CPL1 = 0xFF;
PCA0CPH1 = 0xFF;
PCA0CPL2 = 0xFF;
PCA0CPH2 = 0xFF;
PCA0CPL3 = 0xFF;
PCA0CPH3 = 0xFF;
}
void Port_IO_Init()
{
// P0.0 - Skipped, Open-Drain, Digital
// P0.1 - Skipped, Open-Drain, Digital
// P0.2 - Skipped, Open-Drain, Digital
// P0.3 - Skipped, Open-Drain, Digital
// P0.4 - Skipped, Open-Drain, Digital
// P0.5 - Skipped, Open-Drain, Digital
// P0.6 - CEX0 (PCA), Open-Drain, Digital
// P0.7 - CEX1 (PCA), Open-Drain, Digital
// P1.0 - CEX2 (PCA), Open-Drain, Digital
// P1.1 - CEX3 (PCA), Open-Drain, Digital
// P1.2 - Skipped, Open-Drain, Digital
// P1.3 - Skipped, Open-Drain, Analog
// P1.4 - Skipped, Open-Drain, Analog
// P1.5 - Skipped, Open-Drain, Analog
// P1.6 - Skipped, Open-Drain, Analog
// P1.7 - Skipped, Open-Drain, Analog
// P2.0 - Unassigned, Open-Drain, Digital
// P2.1 - Unassigned, Open-Drain, Digital
// P2.2 - Unassigned, Open-Drain, Digital
// P2.3 - Unassigned, Open-Drain, Digital
// P2.4 - Unassigned, Open-Drain, Digital
// P2.5 - Unassigned, Open-Drain, Digital
// P2.6 - Unassigned, Open-Drain, Digital
// P2.7 - Unassigned, Open-Drain, Digital
P1MDIN = 0x07;
P0SKIP = 0x3F;
P1SKIP = 0xFC;
XBR1 = 0x44;
}
void Oscillator_Init()
{
OSCICN = 0x87;
}
void Interrupts_Init()
{
EIE1 = 0x10;// fot PCA0 interrupt
IE = 0x80;
}
// Initialization function for device,
// Call Init_Device() from your main program
void dvC8051F4XXInitial(void)
{
PCA_Init();
Port_IO_Init();
Oscillator_Init();
Interrupts_Init();
}
void main (void)
{
//***
dvC8051F4XXInitial();
while(1){
}
}
